Makefile integration via
bindgen for FFI bindings
arrayVec for RAM allocation
The RTX_2000 simulator from Phil Koopman has the instruction decoding logic. It also nicely integrates the zero-cycle “;” word.
Use Rust’s “no-std” feature flag. After all, this is an embedded system. SIMH provides virtual file I/O, debugging support, virtual console, virtual display.
See if instruction decoding can be accomplished via Rust’s enum type.
Rust’s Borrow Checker will verify memory read/write access.
Rust’s array slices should be useful.
You fill insub/readme.txt
sim_instrdo the instruction decoding and execution.
sim_loadwill typically take some input file and put it in memory.
cpu_regshould contain all machine state.
fprint_symis to assemble (with DEPOSIT) and disassemble (EXAMINE-M) instructions.
sim_devicesis an array of DEVICE * for peripherals. Something like
build_dev_tabwill go through the array and initialize data structures
at run time.
Refer to this: simh doc
Make use of asynchronous events.
sim_activateposts a future event.
The “svc” routine will be called.
parse_sym invokes Forth interpreter
print_sym invokes Forth disassembler